3D Microelectronic Packaging: From Fundamentals to by Yan Li, Deepak Goyal

By Yan Li, Deepak Goyal

This quantity offers a entire reference for graduate scholars and pros in either academia and at the basics, processing info, and purposes of 3D microelectronic packaging, an development for destiny microelectronic applications. Chapters written by means of specialists hide the latest learn effects and growth within the following components: TSV, die processing, micro bumps, direct bonding, thermal compression bonding, complex fabrics, warmth dissipation, thermal administration, thermal mechanical modeling, caliber, reliability, fault isolation, and failure research of 3D microelectronic programs. quite a few photos, tables, and didactic schematics are incorporated all through. This crucial quantity equips readers with an in-depth figuring out of all elements of 3D packaging, together with packaging structure, processing, thermal mechanical and moisture comparable reliability matters, universal mess ups, constructing parts, and destiny demanding situations, offering insights into key parts for destiny examine and development. 

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Extra resources for 3D Microelectronic Packaging: From Fundamentals to Applications (Springer Series in Advanced Microelectronics)

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W. Nelson, D. Pantuso, P. Reed, J. Rupley, S. Shankar, J. Shen, C. Webb, Die stacking (3D) microarchitecture. Paper presented at the 39th annual IEEE/ACM international symposium on microarchitecture (MICRO’06) 2006 28. M. H. Ozguz, 3D system architectures, in Intelligent Integrated Microsystems, ed. A. C. Wolper, Proc. of SPIE 6232 6232K (2006). 667381 29. P. Jacob, O. Erdogan, A. M. P. F. McDonald, Predicting the performance of a 3D processor-memory chip stack. IEEE Des. Test Comput. 22, 540–547 (2005) 30.

M. H. Ozguz, 3D system architectures, in Intelligent Integrated Microsystems, ed. A. C. Wolper, Proc. of SPIE 6232 6232K (2006). 667381 29. P. Jacob, O. Erdogan, A. M. P. F. McDonald, Predicting the performance of a 3D processor-memory chip stack. IEEE Des. Test Comput. 22, 540–547 (2005) 30. P. Franzon, E. Rotenberg, J. R. Davis, H. Zhou, J. Schabel, Z. B. Dwiel, E. Forbes, J. Huh, S. Lipa, Computing in 3D. Presented at the 2015 custom integrated circuits conference (CICC), 2015 IEEE, pp. 1–6, 28–30 Sept.

TSV-based SIPs have been the subject of considerable research for more than two decades and numerous papers have explored applications, architecture and design opportunities, as well as process, material, and equipment complexities [11–14]. Since it is difficult to comprehensively discuss all these aspects in a general overview, this chapter will attempt to provide a broad perspective of the architectural and process opportunities and complexities. The process of TSV formation has been previously discussed in depth in Chap.

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